IC Resources
Application Specific Integrated Circuit Design Engineer

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ASIC Design Engineer - all levels
You must be prepared to travel into Cambridge 2-3 times per week.
A fast-growing US start-up is expanding into the UK and building a world-class hardware team from the ground up. Backed by a proven leadership team with a strong track record of success, this is a rare opportunity to join at an early stage and play a key role in the next wave of AI innovation.
As AI workloads become increasingly complex, the demand for high-performance compute platforms integrating CPUs, GPUs, and neural accelerators is accelerating rapidly — and this company is at the forefront of that evolution. They are now looking for an experienced ASIC Design Engineer to join their Fabric IP team, bringing deep expertise in microarchitecture and RTL design to help shape the future of their technology portfolio.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
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No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
What you’ll be doing
- Architect and develop microarchitectures for a suite of highly configurable IPs
- Drive RTL development with a strong focus on performance, power, and area optimisation
- Collaborate closely with verification teams on assertions, test plans, coverage, debug, and validation activities
- Contribute to the development of next-generation interconnect and compute technologies
What they’re looking for
- BS/MS in Electrical Engineering, Computer Engineering, or Computer Science
- 8+ years of hands-on experience in microarchitecture and RTL development
- Strong Verilog/SystemVerilog expertise
- Solid understanding of industry-standard EDA tools and design methodologies
- Deep knowledge of on-chip interconnects and NoCs
- Experience with cache coherency, memory subsystems, interconnects, or NoC IP is highly desirable
- Background in CPU/GPU design would be a strong advantage


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What’s on offer
- Competitive base salary up to £120,000 depending on experience
- Share options and performance-related bonus
- Opportunity to join as one of the first UK hires
- Chance to influence both the technology and culture of a pioneering AI hardware company
- Work alongside an elite global engineering team tackling cutting-edge challenges in compute architecture
To be considered, you must already be living and working in the UK and be happy to work onsite in either Bristol or Cambridge.
For more information, please contact Rachel Mason at IC Resources
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