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Sundayy

Design Engineer

England
Posted about 14 hours ago
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About The Company

ARM is a global leader in semiconductor and software design, renowned for its innovative technologies that power a vast array of devices from smartphones and tablets to automotive systems and IoT solutions. Our Systems Media IP group specializes in developing advanced multimedia processing units, including Image Signal Processors (ISPs), Display Processors, and Video codecs. These intellectual properties are integral to our customers' products, enabling high-quality imaging, efficient video processing, and seamless multimedia experiences across various end markets such as automotive, IoT, and consumer electronics. With a strong focus on innovation, quality, and collaboration, ARM continues to push the boundaries of what is possible in multimedia processing and embedded system design.

About The Role

We are seeking creative and enthusiastic design engineers to join our newly formed Systems Media IP team. In this role, you will have the opportunity to contribute to the development of cutting-edge multimedia IP cores that influence millions of devices worldwide. You will be involved in all phases of hardware design, from architectural investigations and modeling to implementation, testing, and maintenance. As part of our team, you will work closely with verification, modeling, software driver development, and research teams to deliver robust, high-performance, and area-efficient hardware modules. This role offers significant growth potential, allowing you to shape the future of multimedia processing technologies while advancing your technical and leadership skills within a collaborative environment.

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Qualifications

  • Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field
  • Proficiency in SystemVerilog, Verilog, or VHDL
  • Experience in ASIC RTL design, preferably for multimedia IP such as ISPs, DPUs, or VPUs
  • Knowledge of UNIX/Linux operating systems and scripting languages including TCL, Perl, Python, or Shell scripting
  • Familiarity with all design stages: concept, specification, implementation, testing, and documentation
  • Prior experience in technical or team leadership roles (for senior positions)
  • Understanding of industry-standard protocols such as AMBA interfaces and DDR specifications
  • Exposure to functional safety standards like ISO 26262 or IEC 61508 (desirable)
  • Programming skills in MATLAB, C, or C++ (desirable)
  • Experience with SystemVerilog Assertions (SVA) and Continuous Integration flows (desirable)

Responsibilities

  • Own and lead the development of hardware modules at the unit or hierarchy level, including technical leadership of entire IP blocks
  • Design, implement, and verify innovative imaging algorithms and video codecs to enhance multimedia capabilities
  • Engage in all aspects of hardware design, including architectural investigations, modeling, specifications, simulation, and backend implementation support
  • Identify opportunities for process improvements across Media IP development workflows and implement effective changes to enhance efficiency
  • Collaborate closely with verification teams, modeling teams, software driver developers, multimedia architects, and imaging researchers to ensure seamless integration and performance
  • Mentor and support junior team members, fostering a collaborative and innovative work environment
  • Maintain and support existing IP blocks, ensuring robustness, maintainability, and compliance with industry standards

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Benefits

  • Opportunity to work on innovative multimedia technologies that impact millions of devices globally
  • Continuous professional growth and development in a collaborative environment
  • Access to cutting-edge tools and resources for hardware design and verification
  • Flexible working arrangements, including hybrid work models
  • Comprehensive health and wellness benefits
  • Generous leave policies and work-life balance initiatives
  • Participation in a diverse and inclusive workplace that values innovation and mutual respect

Equal Opportunity

ARM is an equal opportunity employer committed to creating an inclusive environment where all individuals are valued and respected. We do not discriminate based on race, color, religion, sex, sexual orientation, gender identity, national origin, disability, or veteran status. We believe that diverse teams foster innovation and excellence, and we welcome applicants from all backgrounds to join our community of talented professionals.

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Skills

SystemVerilog
Verilog
VHDL
ASIC RTL Design
UNIX/Linux
TCL
Perl
Python
Shell Scripting
AMBA Interfaces
DDR Specifications
ISO 26262
IEC 61508
MATLAB
C++
SystemVerilog Assertions

Location

England, United Kingdom

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