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Design Verification Team Lead (Mixed-Signal ASIC)

City of Edinburgh
£90k/yr
Posted about 15 hours ago
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A leading global semiconductor company in Edinburgh, UK (20,000+ employees, 30+ countries) is looking for a Design Verification Team Lead to drive verification on complex mixed-signal ASICs.

This is an ideal step-up role for someone who’s led a small team (2-3 engineers) and wants more ownership, without moving into heavy people management. The package is highly competitive, with a base salary up to £90,000, plus bonus and RSUs on top.

The role

  • Lead and mentor a small verification team
  • Define and execute verification strategy (UVM/SystemVerilog)
  • Oversee functional + formal verification
  • Collaborate with design & architecture teams
  • Drive coverage, quality, and delivery

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Strong

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What You’ll Bring

  • Strong design verification background (digital or mixed-signal)
  • Experience leading small teams or projects
  • Skills in SystemVerilog, UVM, assertions, coverage
  • Exposure to mixed-signal / ASIC environments (RNM a bonus)

Why join

  • Work on globally deployed technology
  • Clear path into technical leadership
  • Relocation support available
  • High-impact role in a growing, innovative business

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Who This Suits

  • Senior Engineers stepping into leadership
  • Small team leads wanting more scope and visibility
  • Engineers open to relocation + global projects

If you want influence, ownership, and real technical leadership (without becoming a full-time manager), this is a strong move.

Interested? Contact me directly – Steph Hutchinson

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Skills

Design Verification
SystemVerilog
UVM
Assertions
Coverage
Mixed-Signal ASIC
Formal Verification
Technical Leadership
Mentoring

Location

City of Edinburgh, Scotland, United Kingdom

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