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Kandou AI

DFT Engineer

Reading
Posted about 20 hours ago
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Challenges are our drive, innovation our calling. We at Kandou AI are a team of passionate accomplished professionals making a mark in the semiconductor industry. We're an innovative leader in high-speed and energy efficient chip-chip link solutions critical to the evolution of the electronics industry, continuously developing to meet the demands of not just the customers of today, but of tomorrow too.

If you love to be part of a high-tech scale-up and are motivated by pushing your limits and challenging the status quo, we have an opportunity for you.

We are actively seeking a resourceful DFT Engineer based in Lausanne, Switzerland or UK.

Key Responsibilities:

  • Hierarchical MBIST and scan insertion, BSD implementation
  • ATPG pattern generation, coverage analysis, converging to high coverage metrics
  • Pattern simulations with timing
  • Defining test mode timing constraints, analyzing the timing reports and converge timing
  • Developing cycle accurate functional patterns using IJTAG methodology
  • Closely working with the test and production engineering teams to debug and bring up devices at probe and final test
  • Debugging silicon issues

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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It searches the market for you

Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.

Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Skills:

  • Excellent communication skills, and strong team player with can do type of attitude
  • Excellent debugging skills
  • Good scripting skills to develop automation

Qualifications:

  • 5+ years of DFT experience including implementation, test pattern development, and simulation
  • Proven experience in contributing to DFT solution to complex designs
  • Experience working with IJTAG methodologies
  • Experience with hierarchical MBIST insertion, hierarchical scan insertion and scan compression methodologies
  • Experience in ATPG pattern generation for different kinds of fault models, fault coverage analysis and converging to high coverage metrics
  • Good debug capabilities in simulating patterns with timing
  • Experience with industry standard EDA tools for DFT, timing, and simulation
  • Knowledge of System Verilog

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Education:

  • Bachelor of Engineering in Electronics and Electrical Engineering, Computer Engineering (equivalent or higher)

Relocation support to Switzerland is offered by Kandou AI for eligible candidates.

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Skills

DFT
MBIST
Scan Insertion
ATPG
IJTAG
System Verilog
Scripting
Timing Analysis
Pattern Simulation
Silicon Debugging
EDA Tools
Fault Model Analysis

Location

Reading, England, United Kingdom

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