Rodeo
Get started

Axelera AI

Director - Silicon Logical Design

Wales
Posted 6 months ago
Sign up to applySee more jobs like this

How your CV stacks up

1Upload CV
2Analyse CV
3Improve CV

Upload your CV to see how well it fits this job role

?%

About Us

Axelera AI is not your regular deep-tech startup. We are creating the next-generation AI platform to support anyone who wants to help advancing humanity and improve the world around us.

In just four years, we have raised a total of $370 million and have built a world-class team of 220+ employees (including 49+ PhDs with more than 40,000 citations), both remotely from 18 different countries and with offices in Belgium, France, Switzerland, Italy, the UK, headquartered at the High Tech Campus in Eindhoven, Netherlands.

We have also launched our Metis™ AI Platform, which achieves a 3-5x increase in efficiency and performance, and have visibility into a strong business pipeline exceeding $100 million.

Our unwavering commitment to innovation has firmly established us as a global industry pioneer.

Are you up for the challenge?

Position Overview

We are seeking a Director of Silicon Logical Design to lead and scale our digital design organization. In this role, you will be responsible for the architectural realization, RTL implementation, and integration of complex AI accelerator SoCs from specification through tape-out. You will combine deep technical expertise with strong people leadership to drive execution, quality, and innovation across multiple silicon programs.

This is a hands-on leadership role for someone who thrives at the intersection of architecture, implementation, and team building in a fast-paced startup environment.

Key responsibilities:

  • Lead and grow the silicon logical (digital) design team, including RTL, integration, and design methodology
  • Drive the translation of system and micro-architecture specifications into high-quality RTL implementations
  • Own the end-to-end logical design execution for one or more SoCs, from concept through tape-out
  • Partner closely with architecture, verification, physical design, DFT, software, and product teams to ensure robust and scalable designs
  • Define and enforce best practices for RTL quality, coding standards, reuse, and design reviews
  • Oversee block-level and top-level integration, ensuring performance, power, area, and schedule targets are met
  • Support bring-up, debug, and silicon validation activities, including root-cause analysis of silicon issues
  • Contribute to long-term technology and roadmap planning, including IP strategy and future architecture directions
  • Mentor and develop engineers, fostering a culture of technical excellence, ownership, and collaboration

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

Start with a chat, not a search bar

Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.

P

Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

See breakdown
Save jobNot relevant
View details

It searches the market for you

Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.

Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

See breakdown
Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

See breakdown
Strong

Only hits

No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.

Qualifications:

  • Extensive experience in digital / logical design for complex SoCs, with multiple successful tape-outs
  • Proven ability to lead and grow high-performing silicon design teams
  • Strong expertise in RTL and micro-architecture development (SystemVerilog / Verilog)
  • Experience with large-scale SoC integration, including CPUs, accelerators, memory subsystems, and interconnects
  • Solid understanding of performance, power, and area trade-offs in advanced process nodes
  • Experience working closely with verification and physical design teams to achieve functional and timing closure
  • Strong communication skills and the ability to operate at both strategic and hands-on technical levels

Preferred:

  • Experience with AI/ML accelerators, GPUs, NPUs, or high-performance compute architectures
  • Familiarity with industry-standard interconnects (e.g., AXI, NoC architectures)
  • Knowledge of low-power design techniques and multi-clock / multi-voltage systems
  • Experience with silicon bring-up, post-silicon debug, and root-cause analysis
  • Experience working in a startup or fast-scaling environment

Get help with your application

Your very own career expert that helps elevate your application to the next level.

Get help applying for this job

Location

We offer a flexible working arrangement, with options to:

  • Work from one of our Axelera AI offices (Leuven in Belgium, Amsterdam and Eindhoven in the Netherlands, Zurich in Switzerland, Florence and Milan in Italy or Bristol in the United Kingdom) if you're already based in the vicinity.
  • Work fully remotely from any European country (incl. the UK) you are already in.
  • Relocate with us and work from Italy (Florence or Milan) or the Netherlands (Amsterdam or Eindhoven).

What We offer

This is your chance to shape and be part of a dynamic, fast-growing, international organization. We offer an attractive compensation package, including a pension plan, extensive employee insurances and the option to get company shares.

An open culture that supports creativity and continual innovation is awaiting you. Collaborative ownership and freedom with responsibility is characteristic for the way we act and work as a team.

At Axelera AI, we wholeheartedly embrace equal opportunity and hold diversity in the highest regard. Our steadfast commitment is to cultivate a warm and inclusive environment that empowers and celebrates every member of our team. We welcome applicants from all backgrounds to join us in shaping the future of AI.

Trusted by 25,000+ job seekers

“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”

Jessica, London

Get help applying for this job

Skills

RTL Design
SoC Integration
SystemVerilog
Verilog
Micro-architecture Development
Digital Design
People Leadership
AI Accelerator Design
Low-power Design
Silicon Validation
DFT
Physical Design
AXI
NoC Architectures
Post-silicon Debug
Tape-out Management

Location

Wales, United Kingdom

Sign up to applySee more jobs like this