Copello Global
Firmware Engineer

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Firmware Engineer - Gloucester - up to £90,000
We've got a unique opportunity for an SC cleared Firmware Engineer to join our client on mission-critical programmes of work.
Join a growing technology organisation delivering mission-critical solutions across National Security and Defence. You'll work on cutting-edge SDR, FPGA, RF and SIGINT technologies within secure customer environments.
The Role
We're looking for an experienced Firmware Engineer with strong VHDL and FPGA expertise to:
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
- Develop OpenCPI components using C/C++ and HDL.
- Design and optimise FPGA solutions using VHDL/Verilog.
- Integrate DSP into FPGA and embedded Linux environments.
- Support SDR, RF and SIGINT systems.
- Contribute to technical design, architecture and hardware/software integration.
- Work with customers and delivery teams in secure environments.
About You
You'll have:
- Strong VHDL and FPGA development experience.
- Experience with OpenCPI.
- Knowledge of SDR, DSP and/or RF technologies.
- C/C++ and embedded Linux experience.
- Ideally, a background in Defence, National Security or communications.
- Strong problem-solving and communication skills.


Get help with your application
Your very own career expert that helps elevate your application to the next level.
Ready to work on technology that matters? Please call Victoria at Copello on 07341347640 and email a copy of your up to date CV to victoria@copello.co.uk
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