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FPGA Engineer – Bristol
IC Resources is working on behalf of a rapidly growing sensing technology company, looking to hire an experienced FPGA Engineer to join their on-site development team near Bristol.
As an FPGA Engineer, you will play a key role in developing cutting-edge distributed fibre sensing instruments used globally to monitor critical infrastructure such as borders, pipelines, railways, and power networks. You’ll work in a fast-paced, collaborative environment alongside scientists and engineers, helping take products from concept to real-world deployment.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
This is a hands-on FPGA Engineer role with a mix of new product R&D and enhancements to existing platforms.
Key Skills Required
- Strong VHDL experience using Xilinx Vivado
- Multi-clock domain design and timing closure expertise
- Experience implementing DSP functions (e.g. DDC, filters, FFT) in FPGAs
- Familiarity with Xilinx RFSoC Ultrascale+ and associated ADC/DAC peripherals
- Understanding of high-speed digital and analogue hardware design and debug


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If you’re interested in the position of FPGA Engineer, please apply or contact Sam Cruse.
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Jessica, London
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