ITDev
FPGA Engineer - Design and Verification

How your CV stacks up
Upload your CV to see how well it fits this job role
?%
Build valuable FPGA design and verification expertise without narrowing your engineering career.
At ITDev, you’ll work on real FPGA projects across broadcast, communications, aerospace and other advanced engineering markets, while developing specialist skills in SystemVerilog and UVM.
You’ll develop this expertise as part of a broad engineering role, working alongside experienced colleagues across the FPGA development lifecycle. This means building your FPGA design capabilities as well as learning how to verify complex systems properly.
Most of our work involves developing new products and features rather than supporting legacy systems. One project might involve high-performance video processing; another could take you into communications, aerospace or a completely new application area. As one of our Electronics Engineers said: “One of the attractors to me about ITDev is that there is no end to the kind of projects you can work on.”
Your professional development won’t be something you’re expected to fit around project delivery. You’ll have a personal development plan, your own mentor and dedicated time away from projects each week to work towards your development objectives. We’ll provide relevant training, pay your IET membership fees, and support you if you want to work towards becoming a Chartered Engineer.
You’ll also have the flexibility to work on a hybrid basis, be eligible for an uncapped annual profit share from your first day, and the support of a close-knit engineering team where people are encouraged to build long-term careers. Our approach has been recognised by the South Coast Tech Awards: ITDev won Tech Employer of the Year in 2019, was a finalist in 2023 and has been nominated for the award again in 2026.
The role
You’ll begin by building on your existing FPGA and digital-design knowledge. Alongside this, we’ll train and support you in SystemVerilog and the Universal Verification Methodology (UVM). Over time, your role is likely to develop into a blend of FPGA design and advanced verification, depending on your experience, interests and the requirements of different projects.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
Start with a chat, not a search bar
Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
See breakdownIt searches the market for you
Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
You’ll be involved in:
- Implementing, simulating and testing FPGA logic.
- Building, maintaining and running automated SystemVerilog/UVM testbenches.
- Helping to develop structured test cases and verification plans.
- Investigating test failures and tracing defects to their underlying causes.
- Using simulation, synthesis and hardware-debugging tools.
- Automating engineering tasks using scripting languages such as Python or Tcl.
- Taking part in design and code reviews.
- Communicating technical progress, decisions and results clearly to colleagues.
- Learning and applying the quality and safety standards required across different engineering markets.
The scope and complexity of your responsibilities will grow with your experience.
Who we’re looking for
You could be a graduate with strong digital-engineering foundations or an engineer who already has some FPGA design experience. You don’t necessarily need in-depth knowledge of SystemVerilog or UVM. What we’re looking for is the underlying aptitude to become good at verification.
You’ll need to be someone who enjoys getting beneath the surface of difficult technical problems. You naturally think about how a design could fail, enjoy tracing problems back to their root cause and take a structured approach to proving that something works.
Essential skills and experience
- A degree in Electronic Engineering or a closely related subject.
- A sound understanding of digital logic, computer architecture and FPGA principles.
- Experience writing HDL code using VHDL, Verilog or SystemVerilog through university work, personal projects or employment.
- Some experience of simulating, testing or debugging digital designs.
- Strong analytical and problem-solving skills.
- A careful and structured approach to engineering work.
- The curiosity and persistence to investigate why something behaves differently from the way it should.
- The ability to explain your thinking and work effectively with other engineers.
- Evidence that you have independently developed your technical knowledge or taken a project beyond its basic requirements.
- Full, unrestricted right to work in the UK (we are not looking to sponsor visas for this role now or in the future).


Get help with your application
Your very own career expert that helps elevate your application to the next level.
Desirable skills and experience
- Experience using FPGA tools such as AMD Vivado or Altera Quartus Prime.
- Familiarity with testbenches or verification concepts.
- Experience using simulation tools such as QuestaSim.
- Exposure to Python, Tcl or another scripting language.
- Familiarity with Git, Subversion or another revision-control system.
- University, personal or commercial projects involving FPGA development, embedded systems, digital signal processing, communications or networking.
- Practical experience using equipment such as oscilloscopes or logic analysers.
- Previous SystemVerilog or UVM experience would be useful, but it isn’t required. Your underlying engineering ability, approach to problem-solving and capacity to learn matter more.
- We also actively encourage applications from people returning to engineering after a career break.
About ITDev
ITDev provides fully managed technology design services from our offices on Southampton Science Park. Since 2000, we’ve developed embedded software, electronics, FPGA technology and complete systems for customers in the UK and internationally. Our work ranges from specialist contributions to large engineering programmes through to the independent development of complete products and systems. Our software and electronic designs are used by millions of people. Alongside our client work, we develop our own FPGA technology for video processing and media-over-IP applications.
“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”
Jessica, London
Location