Kelvin Quantum
Mixed-signal/Analog/ RF ASIC Designers (multiple positions)
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Mixed-signal & analog/RF ASIC designer
On-site · Glasgow, UK · Full-time, permanent · £55,000 – £75,000
About us
Kelvin Quantum is a semiconductor company spun out of the University of Glasgow. We develop hardware that runs continuously from room temperature down to deep cryogenic environments, near absolute zero — from individual integrated circuits to fully integrated control and readout systems for next-generation quantum technologies. Our technology lets quantum hardware teams build scalable, more powerful machines with real-world impact.
The role
You will design low-power, low-noise integrated circuits — DACs, ADCs, LNAs, RF mixers, PLLs, multiplexers, power supplies and bias networks — that must work reliably at cryogenic temperatures. Every block is yours from architecture and specification through schematic, layout supervision and tape-out, to characterisation in our cryogenic lab. It is a hands-on role with a clear route into technical leadership as we grow.
What you'll do
- Take analogue, mixed-signal and RF CMOS blocks from specification to silicon — schematic, layout supervision, tape-out and bring-up
- Design low-noise, low-power circuits for the control and readout of solid-state qubits
- Run full design verification: schematic, pre- and post-layout simulation
- Work with our packaging, PCB, FPGA and quantum applications teams to integrate ASICs into cryostat subsystems
- Support tape-out, characterise silicon at room and cryogenic temperatures, and write the technical documentation that goes with it
- Mentor junior engineers and help shape how the IC team works as we grow
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What we're looking for
Every one of these matters to us — tell us how you meet them.
- A degree in Electrical/Electronic Engineering, Physics, Microelectronics or a related field
- 3+ years' professional experience in analogue, RF or mixed-signal CMOS IC design
- Production experience with Cadence Virtuoso, Spectre and ADE, and a full ASIC flow: DRC/LVS, parasitic extraction, post-layout simulation (Calibre or PVS/QRC)
- A real design portfolio in at least one of: data converters (DAC/ADC), low-noise amplifiers, RF mixers, RF synthesisers, bandgap/biasing, high-speed multiplexers
- Working knowledge of CMOS device physics, noise analysis, mismatch and layout-dependent effects
- At least two ASICs taken through tape-out and bring-up
- Good written and verbal communication
- Right to work in the UK
Useful, never required
None of this is a filter.
- Designing or measuring ICs at cryogenic temperatures; cryogenic device modelling or cryo-CMOS SPICE models
- Advanced CMOS nodes — 40 nm and below, 22/28 nm FDSOI
- Cloud-based EDA flows (AWS or equivalent), foundry MPW / shuttle logistics
- IC design for quantum control and readout, or extreme environments
- RF measurement and microwave packaging
- Verilog / SystemVerilog, enough to talk sensibly with the FPGA and digital teams
- Publications, patents and/or shipped products
Why Kelvin Quantum
You'll have direct impact on next-generation scalable quantum hardware and real scope for original technical work, inside a collaborative start-up with access to the University of Glasgow nanoelectronics and quantum circuits groups, Innovate UK consortium partners and tier-one foundries. We back continuous learning, conferences and training, with a clear path towards Principal or Staff-level roles — and the chance to shape the team as it grows.
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Design, tape-out and measurement sit in the same building. You will see your own silicon come back, cool it down, and find out what it really does — a loop most IC designers never get to close.
The package
- £55k – £75k depending on experience
- Performance-led annual bonus
- Enhanced employer pension contribution
- 28 days' leave plus UK public holidays
- Annual learning budget for training and conferences
- Glasgow office with regular team socials and offsites
The process
Five steps, respectful of your time:
- CV and cover letter
- Introductory call (~30 mins)
- Technical interview (~60 mins)
- Half-day on-site (meet the team, a design problem, the lab)
- References, offer, welcome.
Equal opportunity
We're committed to building a diverse and inclusive team and provide equal employment opportunity regardless of age, sex, sexual orientation, gender identity, race, colour, religion, disability status, marital status, pregnancy, gender reassignment or any other protected characteristic. If you need any adjustments during the application or interview, just let us know.
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