Plessey Semiconductors Ltd
Optical Interconnect Architect

How your CV stacks up
Upload your CV to see how well it fits this job role
?%
About Plessey Photonics
We’re building the hardware foundation for next-era computing.
Plessey Photonics Systems is built on our existing technology capabilities at Plessey, a world-leading technology company driving the next generation of photonic devices and systems. With over seventy years of innovation, we combine research, materials science, process engineering, and manufacturing capabilities. Plessey Photonics Systems is defining next-generation optical interconnect technologies.
Join us to work on breakthrough technologies shaping the future of light-based technology and computing
Location
Based in Oxford
Our Values
Lead
We don’t follow industry trends; we create them, pushing boundaries and setting standards others aspire to. Every team member has the power to make decisions, drive change, and deliver excellence. We support each other, challenge one another for the best solutions, and lead by example. Together, we build industries and technologies that shape the future and scale toward our vision of the next era of computing.
Grow
We expand our capabilities every day — deepening our expertise, improving how we work, and pushing the boundaries of what’s possible. Curiosity fuels us: we question assumptions, explore new ideas, and innovate with light-based technologies. By investing in and empowering our people, we strengthen Plessey’s impact and help shape the future of optical technology.
Trust
We operate like a family—honest, reliable, and supportive. We have each other’s backs, own our actions, and uphold the highest standards of integrity and safety. We trust each other to deliver, our customers to challenge us, and our expertise to guide the way. Together, trust enables the collaboration essential for breakthrough innovation and lasting impact.
About the Role
We are seeking an experienced Optical Interconnect Architect to lead the architecture and development of next-generation optical interconnect solution.
The ideal candidate combines deep expertise in high-speed SerDes and ASIC architectures with a strong understanding of optical communications, photonics, and advanced packaging. You will work at the intersection of electrical and optical systems, defining architectures that enable higher bandwidth, lower power consumption, and greater interconnect density.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
Start with a chat, not a search bar
Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
See breakdownIt searches the market for you
Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
This is a highly cross-functional role spanning ASIC/SoC architecture, SerDes, optical engines, photonics, packaging, signal integrity, and system-level interconnects.
Key Responsibilities
- Define system and link architectures for next-generation optical interconnects.
- Develop the electrical/optical interface architecture between ASICs, SerDes, optical engines, and photonic devices.
- Lead architecture of high-speed SerDes-based optical links.
- Evaluate and define architectures for co-packaged optics (CPO), silicon photonics, optical I/O, chip-to-chip and package-to-package interconnects.
- Develop link budgets and system-level requirements covering bandwidth, latency, optical power, insertion loss, BER, energy/bit, thermal performance, and reliability.
- Work closely with ASIC, SerDes, photonics, packaging, and system engineering teams to translate system requirements into implementable architectures.
- Evaluate emerging optical emitter and receiver technologies and their integration with high-speed electrical interfaces.
- Assess new technologies for short-reach optical interconnects, including highly parallel optical architectures and emerging emitter technologies.
- Define electrical and optical interfaces, including requirements for drivers, receivers, modulators, photodetectors, lasers/emitters, and optical coupling.
- Lead architectural trade studies between electrical copper, VCSEL, laser-based silicon photonics, CPO, and emerging optical I/O technologies.
- Develop system-level specifications and contribute to technology roadmaps and product strategy.
- Work with semiconductor and photonics partners to evaluate technology feasibility, performance, scalability, and manufacturability.
- Support prototype development, system validation, and characterisation of high-speed optical links.


Get help with your application
Your very own career expert that helps elevate your application to the next level.
Experience & Attributes
- 10+ years of experience in high-speed semiconductor, networking, optical communications, or related technology development.
- Deep experience with SerDes architecture and high-speed I/O.
- Strong understanding of ASIC/SoC architecture and high-speed electrical interfaces.
- Strong understanding of optical communication systems and optical link architecture.
- Experience with one or more of: Silicon photonics, Co-packaged optics (CPO), Optical transceivers, Optical engines, VCSELs / lasers, Photodetectors, Optical I/O & Chip-to-chip optical interconnects.
- Experience translating system-level requirements into detailed electrical and optical specifications.
- Strong understanding of signal integrity, power integrity, jitter, BER, equalisation, and link budgets.
- Experience working across semiconductor, photonics, and packaging disciplines.
- Strong technical communication skills and ability to lead architecture discussions across multidisciplinary teams.
Advantage
- Experience with Ethernet, PCIe, CXL, UCIe, or proprietary chip-to-chip interconnects.
- Experience with 112G PAM4 or higher-speed SerDes; experience with 224G/448G architectures is highly desirable.
- Experience with advanced semiconductor packaging, chiplets, interposers, or 2.5D/3D integration.
- Experience with optical I/O at the package or die level.
- Experience with photonic integrated circuits (PICs) and/or silicon photonics.
- Understanding of laser and emitter technologies, including VCSELs, DFB/EML lasers, and emerging microLED-based optical sources.
- Experience developing technology roadmaps and evaluating emerging semiconductor/photonics technologies.
- Experience taking an interconnect technology from architecture through prototype and production.
“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”
Jessica, London
Skills