Semiconductor Engineering
PRINCIPAL DESIGN ENGINEER – HIGH-SPEED INTERCONNECT
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Role Overview
Own the microarchitecture, RTL development, and integration of high-speed interconnect subsystems, including PCIe, CXL, and UALink, across multiple silicon products. Translate system and protocol requirements into implementation-ready microarchitecture specifications, interfaces, register definitions, and synthesizable RTL, ensuring detailed execution and delivery.
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- Drive the development process from concept through RTL creation, subsystem integration, verification support, synthesis preparation, and final delivery.
- Collaborate with architecture, verification, performance, firmware, physical design, and implementation teams to meet functionality, bandwidth, latency, power, area, and timing targets, encouraging a culture of inclusion and teamwork.
- Analyze traffic patterns, workloads, queue depths, credits, outstanding transactions, and buffer requirements to guide implementation tradeoffs.
- Lead technical reviews, debug cross-functional issues, improve building methodologies, and mentor engineers, ensuring outstanding performance and reliability.
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