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Principal FPGA Design & Verification Engineer

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Principal FPGA Design & Verification Engineer – DO-254 – Hybrid (Bristol)
We’re looking for a Principal FPGA Engineer to take technical ownership of FPGA design and development for high-integrity aerospace systems.
This is a senior, hands-on role covering the full FPGA development lifecycle, from requirements and architecture through VHDL design, implementation, verification support and certification evidence. You’ll work closely with electronics, systems, software and verification engineers while providing technical leadership across complex FPGA-based products.
Skills & Experience
Essential:
- Significant FPGA design and development experience
- Strong VHDL / RTL design capability
- Experience developing FPGA solutions for safety-critical or high-integrity systems
- Practical experience working within a DO-254 development environment
- Requirements-based FPGA development, decomposition and traceability
- FPGA simulation and debugging using QuestaSim, ModelSim or similar
- Experience with Xilinx Vivado, Intel Quartus or equivalent FPGA toolchains
- Synthesis, constraints and timing closure experience
- Strong configuration management and source control experience
- Ability to lead technical activities, conduct design reviews and mentor other engineers
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
Desirable:
- DO-254 DAL A, B or C experience
- SystemVerilog / UVM and requirements-based FPGA verification
- Verification planning, coverage and evidence generation
- Formal verification, functional coverage or code coverage
- Python, Tcl or shell scripting for FPGA automation
- Automated build, simulation and regression workflows
- HIL / SIL or hardware test environments
- FPGA integration with processors, ADCs/DACs, communications interfaces or control electronics
- Aerospace, defence or avionics experience


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Additional Information
- Permanent position
- £57,500–£72,500 depending on experience
- Hybrid working – Bristol
- Principal-level position
- Opportunity to take significant technical ownership across FPGA design, development and verification
- Work focused on safety-critical and high-integrity aerospace products
“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”
Jessica, London
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