Connected Consulting Limited
Principal IP Verification Engineer
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If you're the kind of Verification Engineer who enjoys owning complex problems rather than just executing tests, this could be worth a conversation.
We're looking for a Principal level engineer to take a leading role in the verification of cutting-edge GPU technology. You'll work on highly complex hardware designs, helping to shape the verification strategy, drive sign-off, mentor engineers, and influence the future direction of verification methodologies.
What You'll Be Doing
- Leading verification activities for GPU components and subsystems from planning through to sign-off.
- Developing verification strategies and building robust UVM environments.
- Creating testbenches, tests, sequences, assertions and coverage models.
- Driving verification closure through metrics, analysis and debugging.
- Influencing design discussions and providing verification-focused feedback.
- Mentoring and supporting other engineers within the team.
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What We're Looking For
- Extensive experience in IP verification, including expert-level SystemVerilog and UVM knowledge.
- Proven experience of developing verification environments for complex RTL designs.
- Experience delivering constrained-random verification and achieving verification closure.
- Strong debugging and root-cause analysis skills.
- Knowledge of ASIC verification flows and methodologies.
- GPU, CPU or SoC architecture experience.
- The ability to lead projects, influence stakeholders and mentor engineers.
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Nice to have
- Formal verification
- Python, C++, SystemC, TCL or Perl scripting.
- Functional Safety / ISO26262 exposure.
- Team leadership experience.
Working pattern
Hybrid working with 3 days onsite each week in either Cambridge / Hertfordshire or Bristol.
Other info
Visa sponsorship will be considered for suitably qualified candidates.
If this sounds interesting, then we’d love to hear from you.
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