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DRW

Senior FPGA Engineer

Amsterdam
Posted 1 day ago
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DRW Overview

DRW is a diversified trading firm with over 3 decades of experience bringing sophisticated technology and exceptional people together to operate in markets around the world. We value autonomy and the ability to quickly pivot to capture opportunities, so we operate using our own capital and trading at our own risk.

Headquartered in Chicago with offices throughout the U.S., Canada, Europe, and Asia, we trade a variety of asset classes including Fixed Income, ETFs, Equities, FX, Commodities, and Energy across all major global markets. We have also leveraged our expertise and technology to expand into three non-traditional strategies: real estate, venture capital, and cryptoassets.

We operate with respect, curiosity, and open minds. The people who thrive here share our belief that it’s not just what we do that matters—it's how we do it. DRW is a place of high expectations, integrity, innovation, and a willingness to challenge consensus.

Experienced FPGA Engineer

We are currently seeking an Experienced FPGA Engineer to join one of our trading teams in Chicago, NYC, London, or Amsterdam. While DRW has been leveraging FPGA technology for a number of years, you will have the opportunity to build FPGA applications for existing teams. We’re seeking a candidate that has a strong understanding of software and hardware interaction. This person will participate in the full development lifecycle, including system and block-level testing, of low latency high throughput FPGA design.

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Responsibilities

  • Architect and implement new FPGA applications (synthesis, place & route, static timing analysis, documentation) from the ground up
  • Research and evaluate a variety of cutting-edge FPGA hardware and technologies
  • Propose creative solutions to overcome FPGA/hardware limitations
  • Liaise directly with software, trading, and other design teams
  • Conduct lab debugging and characterization of new hardware
  • Comfortable doing production support and live debugging
  • Research new techniques, tools, and architectures

Candidate Requirements

  • Bachelor’s degree or higher, Computer/Electrical Engineering with 3+ years of experience within the field; (Master’s degree or higher also counts for experience)
  • Solid Hardware Engineering experience, especially with FPGA
  • Highly autonomous with a can-do attitude able to lead an FPGA-based project from system requirements to production
  • Strong capacity to quickly evaluate FPGA-based project feasibility based on hardware limitations
  • Strong skills in RTL logic design (Verilog) and verification; 2+ years of experience writing Verilog
  • Experience in FPGA design flow including synthesis, place & route, static timing analysis is required
  • Experience with the design of system-on-chip (SOC) architectures, memory & processor subsystems, networking, and peripheral interconnect is required
  • Knowledge of the TCP/IP stack
  • Strong working knowledge of either XILINX or ALTERA FPGA design flow
  • Experience with functional verification utilizing high-level methodologies (e.g., System Verilog) is a plus.
  • Excellent research and data gathering skills

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Location

Amsterdam, North Holland, Netherlands

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