IC Resources
Senior FPGA Engineer

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About the Role
A deep-tech company developing large, low-latency compute systems is looking to bring an FPGA Engineer into its hardware team to help deliver that challenge.
Rather than focusing on isolated IP blocks, you’ll be contributing to a multi-FPGA platform where throughput, latency, and predictability are critical. The work spans architecture, optimisation, and implementation, with a strong emphasis on designing systems that behave consistently under heavy load.
In this role, you’ll design and optimise deeply pipelined RTL, pushing clock frequency while managing area and latency trade-offs. You’ll collaborate closely with software engineers and system architects, review and guide the work of more junior engineers, and help shape how complex requirements are translated into robust hardware designs. The environment is highly collaborative and fast-moving, with an expectation that engineers contribute ideas, challenge assumptions, and continuously refine the system.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
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Requirements
They are looking for an FPGA Engineer with the following background:
- Strong experience with modern FPGA platforms (e.g. AMD/Xilinx or Intel/Altera devices)
- RTL coding experience in VHDL, Verilog, or SystemVerilog
- Background in building or optimising large, complex FPGA or ASIC systems
- Experience with high-performance, low-latency or deeply pipelined architectures
- Proven ability to test, debug, and improve system-level behaviour
- Comfortable translating product-level requirements into clear technical specifications


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Experience with SoC architectures, accelerator-based systems, or ASIC-style environments would be beneficial, but is not essential.
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If you’re interested in the position of FPGA Engineer, please apply or contact Sam Cruse at IC Resources.
“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”
Jessica, London
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