Rodeo
Get started

Oxford Quantum Circuits (OQC)

Senior FPGA Engineer

Reading
Posted 26 days ago
Sign up to applySee more jobs like this

How your CV stacks up

1Upload CV
2Analyse CV
3Improve CV

Upload your CV to see how well it fits this job role

?%

The Mission

At OQC, we aren't just theorising about the future; we're building it. Born from a philosophy of bold innovation, we've successfully transitioned quantum computing from an academic dream into a commercial reality. The most exciting thing is that we're just getting started.

As a Senior FPGA Engineer, you'll play a critical role in designing and delivering the precision control hardware that powers our quantum computing systems. You'll help solve complex technical challenges across FPGA architecture, high-speed data systems, and real-time signal processing — contributing directly to the advancement of scalable quantum computing technologies.

The Role

We're looking for a Senior FPGA Engineer to join our Advanced Product Development Group (APD), working on purpose-built FPGA hardware for quantum computing applications. This role combines deep technical expertise with cross-functional collaboration, system-level thinking, and mentorship responsibilities within a highly innovative engineering environment.

What You'll Be Working On

  • Defining scalable FPGA architectures with a focus on deterministic timing, synchronization, maintainability, and multi-card communication
  • Designing, implementing, and verifying complex RTL for high-performance microwave and RF applications
  • Developing interfaces and control logic for high-speed ADCs, DACs, memory systems, and RF SoC platforms
  • Implementing real-time DSP algorithms optimized for FPGA resources and multi-clock domain designs
  • Supporting hardware bring-up, lab integration, verification activities, and system-level testing
  • Collaborating closely with Electronics, Embedded Software, Mechanical, Cryogenic, and Deployment teams to deliver fully integrated systems
  • Mentoring junior engineers through code reviews, technical guidance, and development best practices while contributing to project planning and technical documentation

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

Start with a chat, not a search bar

Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.

P

Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

See breakdown
Save jobNot relevant
View details

It searches the market for you

Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.

Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

See breakdown
Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

See breakdown
Strong

Only hits

No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.

What We're Looking For

  • Commercial experience in FPGA design and verification within complex hardware environments
  • Experience with System Verilog, and/or VHDL
  • Expert-level proficiency in Verilog and deep understanding of FPGA architectures
  • Strong experience achieving timing closure on high-utilization FPGA designs and writing timing constraints
  • Experience developing systems involving high-speed ADCs/DACs, synchronization across multiple boards/subsystems, and real-time DSP
  • Ability to work independently on technically challenging projects while balancing delivery, quality, and risk
  • Experience collaborating across multidisciplinary engineering teams in fast-paced R&D or product development environments
  • Bachelor's degree (or higher) in Engineering or a related technical discipline
  • Strong communication, leadership, problem-solving, and stakeholder management skills

Get help with your application

Your very own career expert that helps elevate your application to the next level.

Get help applying for this job

The 'Nice-to-Haves'

  • Background in RF and microwave applications
  • Experience developing control electronics for quantum computing systems
  • Familiarity with Altera Quartus toolchains
  • Experience using spectrum analysers, oscilloscopes, and MATLAB/Simulink for DSP modelling
  • Exposure to compliance and validation activities including EMI/EMC, CE, or FCC standards
  • Experience representing engineering teams externally through conferences, technical talks, or industry collaborations

Why Join OQC

You will join a world-class team at the forefront of the next computational era. We offer a culture of bold innovation, the chance to work with unique lab infrastructure, and the opportunity to see your work redefine the limits of computation.

Learn more about our benefits and positive work culture here: https://oqc.tech/company/careers-at-oqc/

Trusted by 25,000+ job seekers

“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”

Jessica, London

Get help applying for this job

Skills

FPGA Design
System Verilog
VHDL
Verilog
RTL Design
DSP Algorithms
Timing Closure
High-speed ADCs/DACs
RF SoC
Hardware Bring-up
System Integration
Mentorship

Location

Reading, England, United Kingdom

Sign up to applySee more jobs like this