Redline Group - Specialist Recruitment for Technology & Electronics Companies
Senior FPGA Engineer – Compute Architecture & Hardware Acceleration

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Senior FPGA Engineer – Compute Architecture & Hardware Acceleration
Excellent opportunity for a Senior FPGA Engineer – Compute Architecture & Hardware Acceleration to join an innovative technology business on a hybrid basis, with time spent at their Oxford site, helping develop next-generation probabilistic computing platforms and advanced hardware acceleration solutions. This role will require expertise in FPGA design, algorithm implementation, and high-speed digital systems development.
Key Responsibilities
- Translate complex probabilistic algorithms from Python, C++, MATLAB and pseudocode into highly pipelined, resource-efficient FPGA RTL designs
- Design and implement custom digital logic in VHDL from scratch where vendor IP is unsuitable, introduces latency or creates bottlenecks
- Architect and integrate high-speed data acquisition pipelines utilising ultra-fast ADCs, PCIe, high-speed Ethernet and transceiver technologies
- Work closely with hardware engineers, software developers, researchers and ASIC architects to define system architecture and technical solutions
- Develop robust verification environments, perform hardware bring-up activities and optimise timing, power and resource utilisation across multiple clock domains
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
Key Skills Required
- Degree in Electrical Engineering, Computer Engineering or a related discipline
- Demonstrable experience of FPGA digital design experience developing complex, high-speed digital systems
- Strong HDL expertise with a proven ability to develop custom RTL from scratch
- Experience with FPGA SoC platforms, including practical knowledge of processor-side development and PS/PL architectures such as Zynq
- Proven ability to translate mathematical or algorithmic models into hardware accelerators using fixed-point arithmetic and bit-accurate modelling techniques
- Strong understanding of timing closure, clock domain crossing (CDC) and advanced digital design principles
- Experience with Xilinx Vivado, Vitis and TCL scripting toolchains
- Familiarity with hardware debugging tools including oscilloscopes, logic analysers, JTAG debuggers and signal generators


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This is an opportunity to work at the forefront of probabilistic computing, helping define the hardware architecture for a revolutionary computing platform while collaborating with leading experts and researchers in the field.
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To apply for the Senior FPGA Engineer – Compute Architecture & Hardware Acceleration role (hybrid and Oxford based), please send your CV to mbelmar@redlinegroup.com, or for more information contact Mike Belmar on 01582 878807.
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