TRIA
Senior Optical Engineer

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Senior Silicon Photonics Engineer (WDM)
💰 £70k–£90k + bonus | 📍 Leeds (onsite) | Permanent, full-time
A UK deep-tech scale-up is building programmable silicon photonic technology that performs compute directly within the data path. That cuts the cost of moving data around and opens up new capability for AI, cybersecurity, and scientific workloads. It's a small, highly technical team working on genuinely hard problems, with real silicon at the end of it.
They're hiring a Senior Silicon Photonics Engineer to own the wavelength division multiplexing architecture for their multi-wavelength, high-speed photonic interconnect and compute platform. If the WDM plan is right, everything downstream works, so this is a role that shapes the product.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
What we're after
- MSc or PhD in photonics, electronic engineering, physics or similar
- Silicon photonics or integrated optics design experience, with successful tapeouts
- Strong WDM link design, resonant devices, and thermal tuning knowledge
- Hands-on AWG, echelle grating or comparable multiplexer design and characterisation
- Photonic circuit simulation, foundry PDKs, and layout verification flows
- Bonus points: Lumerical, Cadence, Python/MATLAB, CW-WDM MSA familiarity
What's in it for you?
- 💡 Ownership of a core architecture, from spec to first silicon
- 🎯 Annual performance-based bonus
- 🏥 Comprehensive healthcare plan
- 🏦 Employer-contributed pension
- 🌴 Generous time off
- 🚀 Start-up pace, where your design decisions go straight into silicon


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You'll define the wavelength plan, channel spacing, and power budget. You'll then weigh up AWG against micro-ring approaches on power, yield, and control complexity. From there, it's simulation across process, wavelength, and temperature corners, followed by foundry-ready layouts and test structures.
You'll work closely with device, PIC, analogue front-end, layout, and packaging engineers. You'll own foundry signoff for WDM functions and get stuck into first-silicon characterisation and debug.
If you've taped out photonics and would rather set the architecture than inherit it, let's talk. Apply here or drop me a message.
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