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Senior Principal CPU Architect – CPU Architecture / Microarchitecture / ISA / Performance Analysis / Hardware-Software Co-Design

Cambridge
Posted about 13 hours ago
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Senior Principal CPU Architect – CPU Architecture / Microarchitecture / ISA / Performance Analysis / Hardware-Software Co-Design

We are currently partnered with a global semiconductor and advanced computing technology organisation developing next-generation high-performance processor architectures.

As part of their continued investment in future CPU technologies, they are looking to appoint a highly experienced Senior Principal CPU Architect to help define the next generations of high-performance CPU architecture.

Key responsibilities

  • Lead architectural pathfinding for next-generation CPU designs and technologies
  • Define and evaluate advanced CPU microarchitectural concepts
  • Develop architectural approaches covering fetch, decode, execution pipelines, out-of-order scheduling, and multi-level memory hierarchies
  • Evaluate and define new instruction-set capabilities, including vector, matrix, and specialised compute instructions
  • Analyse emerging workloads and identify software and application bottlenecks
  • Translate workload and software requirements into future microarchitectural capabilities
  • Work closely with compiler, operating-system, and application-software teams on hardware/software co-design
  • Develop and guide C++- and Python-based cycle-accurate CPU simulation models

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I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Key requirements

  • 10+ years of relevant industry experience in high-performance CPU architecture or closely related processor architecture roles
  • Extensive experience with high-performance CPU architecture and microarchitecture
  • Deep understanding of out-of-order execution and modern superscalar processor design
  • Strong knowledge of branch prediction, register renaming, speculative execution, and execution pipelines
  • Strong understanding of cache hierarchies and memory-system architecture
  • Deep knowledge of cache coherency and coherency protocols
  • Strong understanding of instruction-set architecture and ISA design
  • Knowledge of exception models, memory consistency, and virtualisation
  • Experience analysing workloads using profiling tools, performance counters, and simulation traces
  • Familiarity with performance-analysis environments such as VTune, Perf,

Keywords

Senior Principal CPU Architect / Principal CPU Architect / CPU Architect / Principal Processor Architect / CPU Architecture / Processor Architecture / High-Performance CPU / High-Performance Computing / CPU Microarchitecture / Microarchitecture / Out-of-Order / OoO / Superscalar / Speculative Execution / Branch Prediction / Register Renaming / Instruction Scheduling / Fetch / Decode / Execution Pipeline / Memory Hierarchy / Cache Architecture / Cache Coherency / Coherency Protocols / Memory Consistency / Virtualisation / ISA / Instruction Set Architecture / ISA Design / ISA Extensions / Vector Extensions / Matrix Extensions / Specialised Instructions / Hardware Software Co-Design / Compiler Co-Design / Workload Analysis / Workload Profiling / Performance Analysis / Performance Counters / Simulation / Cycle-Accurate Simulation / Architectural Simulator / CPU Simulator / Performance Modelling / C / C++ / Python / VTune / Perf / SimPoints / LLVM / GCC / x86 / Arm / RISC-V / AI Workloads / Generative AI / Large Language Models / LLM / Graph Analytics / Confidential Computing

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Location

Cambridge, England, United Kingdom

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