IC Resources
Application Specific Integrated Circuit Design Engineer

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ASIC Design Engineer
London
I'm currently working with a well-funded semiconductor start-up that's rethinking how AI accelerators are designed.
Rather than relying on traditional, general-purpose architectures, the team is developing highly specialised silicon that maximises compute efficiency for modern AI workloads. Their innovative approach is already attracting significant industry backing and is challenging conventional thinking around accelerator design.
As the business continues to grow, they're looking for an experienced ASIC Design Engineer to play a key role in developing the next generation of configurable AI processing architectures.
The role
This is a highly technical position where you'll contribute to both architectural direction and hands-on RTL development. You'll work across the full silicon lifecycle, helping transform architectural concepts into production-ready hardware while collaborating closely with Verification, Software and Systems teams.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
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No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
You'll be encouraged to challenge existing approaches, continually refine designs and contribute to the long-term technical direction of the product.
Responsibilities
- Design and implement high-performance RTL for AI accelerator architectures
- Contribute to architectural definition and future product roadmaps
- Optimise existing RTL for performance, power and silicon area
- Evaluate architectural trade-offs and propose design improvements
- Work closely with Verification, Software and Systems Engineering teams throughout development
- Define and document micro-architectures, interfaces and design specifications
- Support integration into complex SoC environments
What they're looking for
- Strong RTL design experience using Verilog or SystemVerilog
- Experience delivering ASIC designs through to silicon
- Exposure to FPGA development and prototyping
- Experience implementing high-performance digital or signal-processing hardware
- Knowledge of integrating accelerator IP into Arm or RISC-V based SoCs
- Scripting experience using Python, Tcl or similar
- Understanding of AI workloads or hardware acceleration concepts
- Experience using Git and modern development workflows
- Familiarity with simulation and verification environments


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About you
You'll thrive in a fast-paced engineering environment where technical ownership is encouraged and every engineer has a genuine influence on the product.
You're comfortable tackling unfamiliar challenges, enjoy working across multiple disciplines and are motivated by building innovative silicon rather than maintaining existing products.
You'll also enjoy collaborating with experienced engineers, sharing knowledge and continuously improving both designs and development processes.
If you'd like to find out more, I'd be happy to share further details confidentially. Contact Rachel Mason at IC Resources
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