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Application Specific Integrated Circuit Design Engineer

Bristol
Posted 1 day ago
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ASIC Design Engineer

Bristol/Oxford

A growing semiconductor design company is expanding its ASIC Digital Design team and is seeking talented engineers with enthusiasm for silicon engineering and a desire to build a long-term career in semiconductors. The company develops complex ASIC and SoC solutions for customers ranging from innovative start-ups to established global organisations across sectors such as automotive, medical, communications, industrial, and aerospace technologies.

This would suit an Engineer who is perhaps ready for their 2nd role in industry and a new technical challenge.

Their unique positioning also allows them to work on their own Chip design projects as well.

This is an opportunity to join an experienced international engineering team working on advanced ASIC and SoC developments from specification through to silicon.

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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The role

You will contribute to the design and development of digital ASIC/SoC solutions, working across multiple stages of the development flow from architecture definition through RTL implementation and verification.

You should already have experience in IC design and demonstrate strong analytical and problem-solving skills, together with the ability to work effectively in a collaborative engineering environment.

Key responsibilities

  • Functional specification of digital modules and subsystems
  • RTL development for digital modules and subsystems
  • Integration of third-party IP into SoC designs
  • Support full-chip integration and subsystem connectivity
  • Run and debug lint, CDC and RDC analysis
  • Perform functional simulation and front-end synthesis checks
  • Contribute to SoC verification activities and silicon bring-up
  • Support design flow and methodology improvements

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Essential skills & experience

  • Degree in Electronics, Physics, or a related discipline (minimum 2:1 or equivalent)
  • 2+ years’ industry experience in digital ASIC or SoC design and/or verification
  • Understanding of the ASIC/SoC development flow from specification to verified RTL
  • Experience with digital verification and structured debugging methodologies
  • Knowledge of Verilog and/or SystemVerilog
  • Programming experience in C, C++, or Python

Additional information

  • Flexible working arrangements available
  • Applicants must have the legal right to live and work in the UK.
  • Bristol, Cambridge, Oxford locations or relocation support can be given for Bristol from other UK Cities.

For more information, please contact Rachel Mason at IC Resources

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Skills

ASIC Design
SoC Design
RTL Development
Digital Verification
Verilog
SystemVerilog
C
C++
Python
Functional Specification
IP Integration
Lint Analysis
CDC Analysis
RDC Analysis
Front-end Synthesis
Silicon Bring-up

Location

Bristol, England, United Kingdom

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