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iXceed Solutions

Application Specific Integrated Circuit Verification Engineer

United Kingdom
Posted 1 day ago
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We're looking for experienced Senior VLSI Verification Engineers to join a high-impact team working on cutting-edge controller and interconnect technologies powering the future of computing and connectivity.

Location: Remote (USA – EST Time Zone)
Employment Type: Full-Time (FTE)

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Strong

Only hits

No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.

Required Skills

  • Strong hands-on experience with SystemVerilog and UVM
  • Expertise in end-to-end IP Verification
  • Experience in test planning, testbench development, simulation, debugging, and coverage closure
  • Strong RTL debugging and problem-solving skills
  • Ability to excel in deep technical interviews and coding discussions

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Preferred Protocol Expertise

  • PCIe Gen6/Gen7
  • LPDDR5/LPDDR6 / DDR
  • Ethernet
  • UCIe

Nice to Have

  • CXL, UAL, CHI, AXI, NoC
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Skills

Systemverilog
Uvm
Ip Verification
Test Planning
Testbench Development
Simulation
Debugging
Coverage Closure
Rtl Debugging
Pcie Gen6
Pcie Gen7
Lpddr5
Lpddr6
Ddr
Ethernet
Ucie

Location

United Kingdom

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