OLIX – Architect, Staff & Senior Systems Software Engineer

About OLIX

AI is growing faster than any technology in history, and the explosion in demand has created a massive infrastructure gap. We’re unable to build chips or power stations quickly enough to keep up. The industry still relies on a ten-year-old hardware blueprint that has hit its limits. A faster, more efficient paradigm is the biggest economic opportunity of the next century and will create the most important company of the decade.

The OLIX Decode Accelerator 1 (DX-1) is the first accelerator designed exclusively for decode, enabling a step change in system-level performance through rack-scale co-design of logic, data movement, packaging, optics, and interconnect.

The Role

We’re searching for Architect, Staff & Senior Systems Software Engineers to own the software stack that brings our next-generation DX-1 accelerator to life as a production inference platform.

The DX-1 is a dataflow architecture built for decode in a disaggregated inference environment. Your mission is to optimise large AI models at rack scale by designing the runtime and serving stack that connects PyTorch and JAX down to the hardware.

This is a whole-stack systems role:

• Work at the intersection of runtime, network, and accelerator
• Partner closely with hardware, compiler, and modelling teams
• Optimise serving performance and shape the platform’s direction

You’ll contribute not just through a list of responsibilities, but through the standards you set, the systems you build, and the teams you grow.

Responsibilities

• Own the runtime & serving stack: Design, build, and extend a distributed inference and serving stack (e.g. MPL LeaF, SGLang, NVIDIA Triton) on DX-1, tackling challenges holistically rather than treating components as a black box.
• Scale distributed inference: Define how inference scales across many accelerators, including tensor/pipeline/data parallelism, collective communication patterns, KV-cache management and offload, and memory-aware scheduling across disaggregated topologies.
• Engineer for reliability at scale: Ensure distributed inference remains dependable through failure handling, graceful degradation, load balancing, and recovery, while establishing standards for observability, tracing, and tooling that enable teams to diagnose problems across the runtime, network, and accelerator.
• Drive bring-up: Evaluate system behaviour pre-silicon through simulation, emulation, FPGA prototyping, or analytical modelling, root-cause issues during bring-up, and influence hardware/software trade-offs early.
• Set standards across teams: Identify the highest-impact systems challenges and ensure they’re addressed. Hold and articulate a clear technical standard while raising the bar through code review, pairing, and constructive challenges. Build leveraged impact by creating shared systems and frameworks rather than assuming singular ownership.
• Shape direction: Bring clarity to ambiguous cross-team problems, push for structural system improvements, and influence long-term platform strategy based on external research, competitive analysis, and industry trends.