iXceed Solutions
Design Verification Engineer
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Position: Verification Engineer
Location: Cambridge, UK
Employment Type: Contract 6 months (possible extension)
About the Role
We are looking for a highly skilled Verification Engineer to join our semiconductor design and verification team. The selected candidate will be responsible for the functional verification of next-generation High-Performance Controller IPs, including PCIe Gen6/Gen7, LPDDR5/LPDDR6, UAL, CXL, and AXI/CHI-based controllers.
The ideal candidate should possess strong expertise in System Verilog and UVM-based verification methodologies, along with hands-on experience in developing scalable verification environments, writing test cases, debugging complex scenarios, and driving verification closure. Protocol knowledge in high-speed interfaces and memory subsystems will be a significant advantage.
Key Responsibilities
- Develop and execute verification plans for high-performance controller IPs.
- Design, develop, and maintain System Verilog/UVM-based verification environments.
- Create reusable testbenches, sequences, scoreboards, monitors, checkers, and coverage models.
- Develop directed and constrained-random test cases to achieve functional and code coverage targets.
- Perform debugging and root-cause analysis of design and verification issues.
- Review specifications and ensure complete verification of protocol compliance and functionality.
- Collaborate closely with design, architecture, and validation teams to resolve complex technical issues.
- Drive regression execution, coverage closure, and overall verification signoff activities.
- Contribute to methodology improvements and automation initiatives within the verification flow.
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Required Skills & Qualifications
Technical Skills
- Strong hands-on experience in System Verilog and UVM.
- Proven experience in IP/Sub-system verification within semiconductor projects.
- Excellent understanding of:
- Verification methodologies
- Constrained random verification
- Functional coverage
- Assertions (SVA)
- Scoreboard and checker development
- Verification planning and closure
- Experience with simulation and debugging tools such as VCS, Xcelium, Questa, or equivalent.
Protocol Expertise (One or More Preferred)
- PCIe Gen6 / Gen7
- LPDDR5 / LPDDR6
- UAL (Universal Accelerator Link)
- CXL (Compute Express Link)
- AMBA AXI
- AMBA CHI
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Key Competencies
- Strong debugging and problem-solving skills.
- Ability to understand complex protocol specifications.
- Excellent analytical and communication skills.
- Self-driven and capable of working in fast-paced project environments.
- Ability to collaborate effectively with cross-functional global teams.
Interview Focus Areas
Candidates should be prepared for deep technical discussions and coding exercises covering:
- System Verilog concepts
- UVM architecture and components
- Constraint randomization
- Functional coverage
- Assertions (SVA)
- Verification environment development
- Protocol-specific scenarios and debugging
- Real project experience in IP verification
Ideal Candidate Profile
A strong verification professional with hands-on expertise in System Verilog, UVM, and advanced protocol verification, who has worked on complex controller IPs such as PCIe, LPDDR, CXL, UAL, AXI, or CHI, and can independently drive verification activities from planning through closure.
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