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Principal Design & Verification Engineer - Datapath & Algorithms
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Principal Design & Verification Engineer - Datapath & Algorithms
Senior Datapath Engineer (Advanced Processor Computations)
Location: Cambridge, UK Department: Research & Development (R&D) Level: Senior / Principal Engineer
About the Role
A newly created position within a major Semiconductor company, requiring a senior/principal-level engineering lead specialising in datapath design for complex processor computations.
This high-impact role involves innovative problem-solving to develop cutting-edge datapath architectures rather than routine maintenance. The candidate must honorably lead critical, high-value projects.
Key Responsibilities
- Design, optimise, and validate architectures for complex data processing pipelines.
- Drive research and development in next-gen compute units (FPU, ALU, ML/AI accelerators).
- Collaborate with cross-functional teams on hardware-software interfaces and system integration.
- Ensure correctness through formal verification (SVA, SV assertions) and functional modelling.
- Deliver high-performance, scalable solutions for CPUs, GPUs, RISC-V, VPUs, and HPC applications.
- Align technical direction with business goals and timelines.
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Ideal Candidate Qualifications
Technical Skills
Candidates must demonstrate expertise in:
- Floating-point computations (FPU, FMA applications)
- Processor architecture (CPU, GPU, APU, RISC-V): ALU logic, pipelines, and scheduling
- Hardware-specific optimisations:
- SIMD/FMA algorithms
- Registers, flip-flops, and bus protocols
- Mathematical/statistical operations (e.g., matrix multiplication)
- Datapath optimisation & validation:
- Model generation & simulation (C/C++ modelling)
- Abstraction techniques (FSMD architectures)
- Formal verification tools (SVA, SystemVerilog)
- AI/ML workloads (e.g., VPUs, feature-rich unit design for linear algebra)
Soft Skills & Mindset
- Maths-driven problem-solving with a curiosity for developing new algorithms/solutions.
- Leadership & leadership skills: Ability to manage, mentor, and direct complex projects.
- Collaborative mindset: Work closely with engineers from architecture, verification, and software teams.
- Self-driven and critical thinker: Not just routine optimiser, but system architect.
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Ideal Background
While not mandatory, the most effective candidates will have:
- Extensive industry experience (preferably 10+ years) in semiconductor HLS/RTL design.
- Wide-ranging knowledge across:
- GPU/CPU/FPU interactions (e.g., GPU datapaths, SIMD, vectorisation)
- Scientific/Bachelor-level proficiency in mathematics (e.g., linear algebra, calculus)
- Formal verification & system architecture, preferably within embedded/accelerated compute domains
Compensation & Benefits
Attractive salary and compensation package available for highly-qualified, senior professionals.
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