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Senior ASIC Design Engineer

Hampshire
Posted about 20 hours ago
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Help Build the Future of Global Connectivity

I’m currently working with an innovative semiconductor company developing next-generation communications technology that will transform how the world stays connected.

Their cutting-edge hardware is enabling future mobile standards by bringing high-performance 5G communications into space, helping deliver truly global connectivity through advanced satellite-based infrastructure.

This is an opportunity to work on complex, high-performance digital hardware, developing ASIC and FPGA solutions that will be deployed in some of the most demanding environments imaginable.

Working as part of a multidisciplinary engineering team, you’ll translate advanced communications algorithms into efficient RTL implementations, contributing to the development of high-performance IP and complete system solutions.

You’ll collaborate closely with Systems, Architecture, Verification and Physical Design teams throughout the full development lifecycle, from specification through implementation and validation.

Responsibilities

  • Translate system and algorithm requirements into efficient RTL micro-architectures
  • Design and implement complex digital logic targeting both ASIC and FPGA platforms
  • Develop simulation environments and testbenches to verify functionality
  • Deploy designs onto FPGA development platforms for validation and system integration
  • Optimise designs for timing, throughput, area and power efficiency
  • Produce high-quality technical documentation, including design specifications and implementation documentation
  • Work closely with Verification, Physical Design and Systems teams to deliver fully integrated solutions
  • Contribute to engineering methodology, design flows and continuous process improvement

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

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Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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What they’re looking for

  • Strong experience designing complex ASIC and/or FPGA digital systems
  • Excellent RTL design skills using Verilog or SystemVerilog
  • Experience optimising high-throughput digital designs for performance, timing and resource utilisation
  • Knowledge of synthesis, timing analysis and power optimisation techniques
  • Experience collaborating across multidisciplinary hardware development teams
  • Comfortable producing clear technical documentation
  • Strong experience using industry-standard simulation and synthesis tools

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About You

You’ll enjoy solving challenging engineering problems and working at the intersection of digital design, communications and high-performance computing.

You’re someone who enjoys collaborating with experts across architecture, verification and implementation while taking ownership of technically demanding RTL development.

Why Join?

  • Work on genuinely world-first communications technology
  • Develop cutting-edge ASIC and FPGA designs for next-generation hardware
  • Collaborate with highly experienced engineers across the complete silicon development flow
  • Gain exposure to advanced communications, high-speed digital design and complex SoC development
  • Be part of a collaborative engineering culture where technical excellence and innovation are at the heart of everything

If you’d like to find out more, I’d be happy to share further details confidentially. For more information, please contact Rachel Mason at IC Resources

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Skills

ASIC Design
FPGA Design
RTL Design
Verilog
SystemVerilog
Digital Logic Design
Micro-architecture
Simulation
Testbench Development
Synthesis
Timing Analysis
Power Optimization
SoC Development
High-speed Digital Design
Technical Documentation

Location

Hampshire, England, United Kingdom

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