Spectrum IT Recruitment
Senior Design Engineer

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We're looking for an experienced Senior Design Engineer to join a team developing cutting-edge communications technology that will help shape the future of global connectivity.
This is an opportunity to work on next-generation 5G non-terrestrial networks developing digital hardware for satellite-based communications systems that will play a key role in delivering worldwide mobile coverage.
Working as part of a highly skilled engineering team, you'll be involved in the design and implementation of high-performance FPGA and ASIC solutions, taking products from architecture through to validation on the latest space-qualified hardware platforms.
Key Responsibilities
- Translating system and algorithm requirements into RTL micro-architectures
- Designing and implementing RTL using Verilog/SystemVerilog for FPGA and ASIC targets
- Creating testbenches and supporting functional verification
- Deploying and validating designs on FPGA development platforms
- Optimising designs for performance, timing, power, and resource utilisation
- Producing high-quality technical documentation
- Collaborating across architecture, verification, physical implementation, and integration teams
- Contributing to continuous improvement of engineering processes and design methodologies
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
Skills & Experience
- Strong RTL design experience using Verilog and/or SystemVerilog
- Proven background developing complex FPGA and ASIC designs
- Experience optimising digital hardware for high-throughput signal or data processing
- Knowledge of synthesis, timing analysis, and power optimisation techniques
- Strong understanding of simulation and synthesis using industry-standard EDA tools
- Experience producing technical design documentation
- Excellent collaboration skills with multidisciplinary engineering teams


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Desirable experience
- Communications or wireless signal processing
- Error correction, channel estimation, equalisation, or beamforming algorithms
- AMBA bus protocols
- UVM verification methodologies
- C++ or SystemC modelling
- High-speed interfaces such as PCIe or JESD
- Python or other scripting languages
- FPGA development using AMD/Xilinx devices
- ASIC backend flows and implementation tools
- Experience working within Agile or structured hardware development lifecycles
Spectrum IT Recruitment (South) Limited is acting as an Employment Agency in relation to this vacancy.
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