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Senior Design Verification Engineer - CPU / SoC

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Senior Design Verification Engineer - CPU / SoC
We are currently partnered with an industry leading semiconductor giant in the UK looking to expand their team with an experienced Design Verification Engineer to join a high caliber team of engineers working on high-performance CPUs and SoC validation. In this role, you will work closely with Architects to prove the correctness of complex micro-architectures before they reach the hands of millions of global users.
This is a permanent position based in Cambridge - please note this is a full onsite role.
Key responsibilities for this Senior Design Verification Engineer position:
- Work with SOC Architects to validate high-level system requirements and micro-architectural concepts.
- Develop detailed Test and Coverage plans for specific functional domains within the CPU.
- Build scalable and portable verification environments, including Stimulus, Checkers, Assertions, and Trackers.
- Enable all features under your care through rigorous regressions and deep-dive debugging of test failures.
- Report progress using advanced metrics, including functional coverage and bug density.
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I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
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Graduate Consultant — 2026 Scheme
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StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
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Key requirements:
- Extensive experience working with CPU technologies with proven skills in domains such as Cache Coherence, Memory Ordering, Branch Prediction, Renaming, and Speculative Execution.
- Experience with Random Instruction Sequencing (RIS) at the Block and Subsystem levels.
- In-depth experience with Simulators, Waveform viewers, and Formal Proof Tools.
- Familiarity with Formal Verification, Assertions, and Silicon bring-up.


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Keywords: CPU Verification / Design Verification / DV / SystemVerilog / UVM / Cache Coherence / Branch Prediction / Formal Verification / RIS / SOC / Assembly / Cambridge / Silicon Bring-up
If you are interested in this Senior Design Verification Engineer position, please send a CV to ts@eu-recruit.com
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