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Senior Design Verification Engineer

Cambridge
£70k – £90k/yr
Posted 1 day ago
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Cambridge, UK | Full-time | Permanent | Hybrid £70,000 - £90,000 DOE + Bonus + Benefits The salary range is intentionally broad, reflecting the flexibility to consider engineers at different levels of experience.


Some of the most exciting breakthroughs in computing are happening behind closed doors, and this is your chance to be part of it. I’m looking for a Staff Verification Engineer to join a stealth-like hardware team in Cambridge working at the forefront of quantum computing and next-generation systems design. This is a rare opportunity to step into a deeply technical, highly collaborative environment where complex hardware challenges meet cutting-edge research.

No quantum computing background is needed. What matters is strong verification expertise, curiosity, and the drive to solve problems that don’t already have answers.

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As a Staff Verification Engineer, you’ll take ownership of verification across block, subsystem, and multi-FPGA system-level designs, working alongside some of the brightest engineers in the industry. With visibility across the full hardware stack, you’ll help shape the verification strategy from the ground up and influence the direction of an emerging technology space.

What you’ll be doing

  • Lead verification strategy and execution across block, subsystem, and multi-FPGA designs
  • Develop scalable, high-performance UVM environments designed to tackle complex architectures
  • Drive verification with a strong focus on coverage, risk reduction, and system-level behaviour
  • Collaborate closely with the Lead Verification Engineer and cross-functional hardware teams
  • Debug challenging issues spanning RTL, simulation, and hardware platforms

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What they’re looking for

  • Strong hands-on expertise in SystemVerilog and UVM
  • Proven debugging skills across RTL, simulation, and hardware
  • Experience owning verification planning and strategy in commercial environments
  • Comfortable operating in fast-moving environments with evolving requirements
  • Exposure to software/programming languages such as C, C++, or Python
  • Formal verification experience would be a plus

This is an opportunity to work on technology that very few people in the world are building — inside a team where your ideas, technical depth, and curiosity will genuinely shape what comes next.

Visa sponsorship can be given to those engineers already based in the UK.

For more information contact Rachel Mason at IC Resources.

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Skills

SystemVerilog
UVM
Verification Strategy
RTL Debugging
Simulation
Hardware Debugging
Multi-FPGA Design
C
C++
Python
Formal Verification
Verification Planning

Location

Cambridge, England, United Kingdom

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