Logik Source
Senior FPGA Design Engineer

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Hybrid FPGA Design Engineer – Disruptive Sustainability Technology
Based in Central London, this exciting hybrid role offers excellent commuting options from Cambridge, Hertfordshire, Buckinghamshire, and surrounding areas. The team specialises in groundbreaking sustainability-focused disruptive technology, leveraging AI/ML techniques, and is seeking a senior FPGA Design Engineer to deliver cutting-edge xPU interface solutions.
Key Responsibilities
- Design high-speed network interfaces between xPU architectures and proprietary networks
- Define and optimise microarchitecture solutions
- Perform rigorous verification using SystemVerilog or equivalent
- Lead and deliver performance trials for real-world testing
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
Minimum Requirements
- Strong technical background with a relevant degree (or equivalent)
- Hands-on industry experience in FPGA design, specialising in:
- GPU/CPU interfacing
- High-speed networking (100Gbps+ transmission protocols)
- Deep experience with:
- SystemVerilog/Verilog/VHDL
- Scripting languages, including TCL/Python (or others)
- Ideally, embedded systems experience alongside FPGA work


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What We Offer
- Competitive remuneration matching global standards
- Performance-driven bonus scheme
- Additional equity/stock options
- Modern hybrid working environment
Interested? Apply immediately—email eva.carey@logiksource.com with your CV and portfolio. Due to LinkedIn application issues, direct enquiries are prioritised. (Alternative: Connect via LinkedIn for other inquiries.)
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