Rodeo
ResourcesPartnersSign in

Plessey Semiconductors

Senior FPGA Engineer

Oxford
Posted 1 day ago
Sign up to applySee more jobs like this

How your CV stacks up

1Upload CV
2Analyse CV
3Improve CV

Upload your CV to see how well it fits this job role

?%

Senior FPGA Engineer

Department: Engineering

Employment Type: Full Time

Location: Oxford

Description

We are looking for a Senior FPGA Engineer to architect, design, implement, and verify FPGA RTL for our optical interconnect development. The work centres on high-speed digital logic, video processing and framing, high-speed serial interfaces, and the on-chip logic that connects our electronics to optical devices.

This is a focused, senior RTL role that runs from architecture and RTL design through simulation, verification, and timing closure to FPGA bring-up and characterisation on the bench. You will own the FPGA design end to end and set the RTL standard for others to follow.

You will work closely with the electronics, RF, and photonics engineers who design the surrounding hardware and optical interfaces.

Key Responsibilities

  • Architect, design, implement, and verify FPGA RTL for high-speed digital, video, and optical-interfacing systems.
  • Develop FPGA designs in VHDL or Verilog/SystemVerilog, including high-speed serial interfaces, video processing, framing, and on-chip instrumentation.
  • Bring up and configure high-speed serial transceivers and clock-data recovery, and implement line coding, pattern generation, and error-rate instrumentation.
  • Design digital video interfaces and the associated framing, timing, and data-handling logic.
  • Develop functional verification: testbenches, simulation, and timing closure across multiple clock domains.
  • Lead FPGA bring-up, debug, and on-board validation, resolving issues across the hardware and firmware boundary.
  • Author and maintain RTL documentation, verification evidence, and coding standards, and contribute to design reviews.
  • Collaborate across electronics, RF, photonics, and systems engineering, and support the path from prototype to product.

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

Start with a chat, not a search bar

Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.

P

Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

See breakdown
Save jobNot relevant
View details

It searches the market for you

Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.

Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

See breakdown
Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

See breakdown
Strong

Only hits

No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.

Skills, Knowledge and Expertise

  • Degree (BEng/MEng) or PhD in Electronic Engineering, Computer Engineering, Physics, or a related field, with substantial relevant experience at senior level.
  • Strong FPGA RTL design in VHDL or Verilog/SystemVerilog.
  • High-speed serial transceiver and clock-data-recovery bring-up, and serial protocols such as line coding and PRBS.
  • Functional verification: testbench development, simulation, and timing closure.
  • Sound clock-domain-crossing and high-speed digital design discipline.
  • Digital video interfacing (for example HDMI) or comparable high-bandwidth digital protocols.
  • FPGA toolchain proficiency, and a willingness to work across vendor toolchains as required.

Get help with your application

Your very own career expert that helps elevate your application to the next level.

Get help applying for this job

Advantage

  • Schematic capture and high-speed PCB design using eCAD tools such as Altium.
  • Knowledge of high-speed PCB layout techniques: controlled impedance, differential routing, length/skew matching, and power integrity.
  • Signal-integrity simulation (for example HyperLynx, Ansys SI, ADS, or similar).
  • Electronic interfacing to optical or other sensor/transducer devices.
  • Test-and-measurement awareness — eye diagrams, error-rate measurement, and high-speed serial debug.
  • A proven track record of delivering FPGA firmware into a product.

Benefits

  • Pension scheme
  • Private medical & dental insurance
  • 28 days’ holiday + bank holidays
  • Relocation support
  • Visa support available
Trusted by 25,000+ job seekers

“It took my CV and asked me questions relevant to understanding what kind of jobs to suggest for me. Suggestions were almost perfect. Jobs were exactly what I’ve been looking for.”

Jessica, London

Get help applying for this job

Skills

FPGA RTL Design
VHDL
Verilog
SystemVerilog
High-Speed Serial Interfaces
Clock-Data Recovery
Functional Verification
Timing Closure
Digital Video Interfacing
HDMI
Clock-Domain-Crossing
FPGA Toolchains
Schematic Capture
High-Speed PCB Design
Signal Integrity Simulation
Optical Interconnects

Location

Oxford, England, United Kingdom

Sign up to applySee more jobs like this