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Graphcore

Silicon Verification Engineer

Cambridge
Posted 2 days ago
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Silicon Verification Engineer

Silicon Verification Engineer

About the Role

Own verification that transforms complex silicon architecture into reliable AI compute hardware.

As a Silicon Verification Engineer, you will:

  • Ensure Graphcore RTL adheres to the architecture specification
  • Protect silicon quality before designs advance to physical implementation

Your work spans the critical junction of architecture, design, and verification, allowing you to directly influence issue resolution—reducing costly problems early.

Key Responsibilities

  • Plan and execute verification processes
  • Define functional coverage and verification metrics
  • Develop tests to diagnose failures and drive closure
  • Enhance shared verification infrastructure for faster debugging

This role is intellectually demanding but directly impactful, helping establish the discipline, scale, and cadence needed for ambitious AI compute programs.


The Team & Culture

The verification team collaborates closely with Architecture, Logical Design, and Physical Design, driven by structured collaboration:

  • Clear project planning, coverage goals, test outcomes, and technical feedback
  • Ownership mindset with emphasis on evidence-based decision-making
  • Open communication across sites—values early problem-solving

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I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.

Decision-making thrives on technical reasoning, shared data, and practical trade-offs. Lead based on expertise—not hierarchy.


What We’re Looking For

Core Experience

  • Verification expertise in CPU, ASIC, or related silicon domains
  • UVM/SVA (Verilog/SystemVerilog) to drive test automation
  • Assembly language, compilers, Git or DRM (Design Rule Management) tools
  • Debugging skillset spanning RTL, hardware software, and verification layers

Technical Skills

  • Proficiency in SystemVerilog for constrained-random test generation
  • Python scripting for verification automation

Benefits

Work-Life Balance

  • Flexible working: Adaptable hours to integrate with personal life
  • Generous leave: Includes rest and self-care time

Financial & Wellbeing Support

  • Pension contribution: Up to 5% matched retirement savings
  • Phantom equity: Potential shareholdings aligned with Graphcore’s success
  • Protective policies: Income protection and life assurance

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Office & Lifestyle Perks

  • Purpose-built offices: Spaces designed for collaboration (with free food!)
  • On-site amenities: Barista services included

Flexible Benefits

  • Add-ons like private medical insurance, dental cover, cycle-to-work schemes
  • Yearly Giving (give as you earn)

About Graphcore

Graphcore pioneers AI compute hardware, accelerating breakthroughs through bespoke hardware, software, and system platforms. As part of the SoftBank Group, Graphcore sits within a leading tech ecosystem committed to upper-limit AI—ensuring scalable, innovative AI benefits reach every industry.

The team is diverse: AI researchers, silicon engineers, and architects. Together, we tackle the hardest challenges in AI with precision and originality.


Ready to shape AI’s future through verification? Apply now.

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Skills

Verification Experience
CPU
ASIC
Silicon Environments
UVM
SVA
Assembly
Compilers
Git
DRMS Tools
Debugging Skills
RTL
Software
SystemVerilog
Python

Location

Cambridge, England, United Kingdom

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