AMD
Staff Design Verification Engineer

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Staff Verification Design Engineer
At AMD, our mission is to build great products that accelerate next-generation computing experiences—from AI and data centers, to PCs, gaming, and embedded systems. Grounded in a culture of innovation and collaboration, we believe real progress comes from bold ideas, human ingenuity, and a shared passion to create something extraordinary.
When you join AMD, you’ll discover the real differentiator is our culture. We push the limits of innovation to solve the world’s most important challenges—striving for execution excellence, while being direct, humble, collaborative, and inclusive of diverse perspectives. Join us as we shape the future of AI and beyond. Together, we advance your career.
The Role
The focus of this role is to plan, build, and execute the verification of new and existing features for AMD’s microprocessor IP, ensuring no bugs in the final design.
The Person
You have a passion for modern, complex processor architecture, digital design, and verification in general. You are:
- A team player with excellent communication skills
- Experienced collaborating with engineers across different sites and time zones
- Strongly analytical with exceptional problem-solving skills
- Willing to learn and ready to take on challenges
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
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Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
Key Responsibilities
- Collaborate with architects, hardware engineers, and firmware engineers to understand new features for verification
- Write and document test plans, accounting for interactions with other features, hardware, firmware, and software driver use cases
- Estimate time required to write new feature tests and any required changes to the test environment
- Build directed and random verification tests
- Debug test failures:
- Determine the root cause
- Work with RTL and firmware engineers to resolve design defects and correct any test issues
- Review functional and code coverage metrics:
- Modify or add tests
- Constrain random tests to meet coverage requirements
- Develop an automated regression infrastructure for functional verification of high-speed microprocessor designs
- Develop interface assertions and collaborate closely with the formal verification team
Preferred Experience
- Proficient in IP-level ASIC verification
- Experience with memory subsystems (a plus)
- Proficient in debugging RTL and firmware code using simulation tools
- Experience with C++ test benches, Linux, and Windows environments
- Familiarity with:
- Verilog
- System Verilog
- C
- C++
- Knowledge of CPU pipeline architecture
- Experience automating workflows in a distributed compute environment
- Exposure to:
- Simulation profiles
- Efficiency improvement plans
- Acceleration and HLS tools/processes
- Strong background in C++ (ideally Linux with Windows exposure)
- Proficiency in SystemVerilog with hands-on experience
- Scripting language experience: (preferred)
- Perl
- Ruby
- Makefiles
- Shell
- Exposure to leadership or mentorship (ideal)
- Prior experience with:
- Memory subsystem verification
- Other CPU unit verification
- 3+ years of experience in design verification


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Academic Credentials
- Bachelor’s or Master’s degree in:
- Computer Engineering
- Electrical Engineering
(Benefits and AMD’s commitment to diversity and inclusion are detailed in the "AMD benefits at a glance" and "Fair Chance Hiring Priorities" section, which are available on the AMD careers site.)
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