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Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported

Cambridge
Posted 2 days ago
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Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported

CPU RTL Design Engineer (Staff)

A fantastic opportunity for an experienced RTL Design Engineer to join a global leader in semiconductors, working alongside their CPU Team in Cambridge (UK).

About the Role

Working on CPU RTL development targeted for high-performance, low-power devices, you will develop designs while collaborating with chip architects to conceive microarchitecture ideas. Early involvement in the product lifecycle ensures direct contributions to architecture and product definition.

What You’ll Be Doing

  • Performance exploration: Collaborate with the CPU modelling team to explore high-performance strategies.
  • Microarchitecture development and specification: Proceed from high-level architectural exploration, through microarchitectural research, and arrive at a detailed design specification.
  • RTL ownership: Develop, assess, and refine RTL design to achieve targets for performance, efficiency, power, and timing.
  • Functional verification support: Assist the design verification team in executing the functional verification strategy.
  • Performance verification support: Ensure the RTL design meets performance goals.
  • Design delivery: Work with a multi-functional engineering team to implement and validate the physical design—focusing on timing, area, reliability, testability, and power.

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I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

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Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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What We’re Looking For

You should have a thorough knowledge of microprocessor architecture, with expertise in one or more of the following:

  • Instruction fetch and decode
  • Branch prediction
  • Instruction scheduling and register renaming
  • Out-of-order execution
  • Integer and floating-point execution
  • Load/store execution
  • Prefetching
  • Cache and memory subsystems

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Required knowledge and skills:

  • Proficiency in Verilog and/or VHDL
  • Experience with simulators and waveform debugging tools
  • Understanding of logic design principles, as well as timing and power implications
  • Knowledge of low-power microarchitecture techniques
  • Understanding of high-performance techniques and trade-offs in CPU microarchitecture
  • Experience using a scripting language such as Perl or Python

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Skills

Microprocessor Architecture
Verilog
VHDL
Simulators
Waveform Debugging
Logic Design Principles
Timing Implications
Power Implications
Low Power Techniques
High Performance Techniques
Scripting Language
Perl
Python

Location

Cambridge, England, United Kingdom

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