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Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported

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Staff RTL/Digital Design Engineer - (CPU Team) - Visas Transfers Supported
CPU RTL Design Engineer (Staff)
A fantastic opportunity for an experienced RTL Design Engineer to join a global leader in semiconductors, working alongside their CPU Team in Cambridge (UK).
About the Role
Working on CPU RTL development targeted for high-performance, low-power devices, you will develop designs while collaborating with chip architects to conceive microarchitecture ideas. Early involvement in the product lifecycle ensures direct contributions to architecture and product definition.
What You’ll Be Doing
- Performance exploration: Collaborate with the CPU modelling team to explore high-performance strategies.
- Microarchitecture development and specification: Proceed from high-level architectural exploration, through microarchitectural research, and arrive at a detailed design specification.
- RTL ownership: Develop, assess, and refine RTL design to achieve targets for performance, efficiency, power, and timing.
- Functional verification support: Assist the design verification team in executing the functional verification strategy.
- Performance verification support: Ensure the RTL design meets performance goals.
- Design delivery: Work with a multi-functional engineering team to implement and validate the physical design—focusing on timing, area, reliability, testability, and power.
Reasons to use Rodeo
I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?
Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.
Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.
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Grad scheme, placement, apprenticeship? Not sure what you want yet — that's fine. Your agent talks it through with you and turns "I have no idea" into a shortlist.
Graduate Consultant — 2026 Scheme
Why you're a good match
StrongYour economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.
See breakdownIt searches the market for you
Every day your agent scans the market matching roles against what actually matters to you, not just keywords on a CV.
Why you're a good match
You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.
Experience fit
Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.
Only hits
No noise. No "maybe this fits." Just roles with a clear explanation of why they're right — and where to focus when applying.
What We’re Looking For
You should have a thorough knowledge of microprocessor architecture, with expertise in one or more of the following:
- Instruction fetch and decode
- Branch prediction
- Instruction scheduling and register renaming
- Out-of-order execution
- Integer and floating-point execution
- Load/store execution
- Prefetching
- Cache and memory subsystems


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Required knowledge and skills:
- Proficiency in Verilog and/or VHDL
- Experience with simulators and waveform debugging tools
- Understanding of logic design principles, as well as timing and power implications
- Knowledge of low-power microarchitecture techniques
- Understanding of high-performance techniques and trade-offs in CPU microarchitecture
- Experience using a scripting language such as Perl or Python
Note
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