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HCLTech

Technical DV Lead

London
Posted 23 days ago
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Technical DV Lead

Multiple Location: Gothenburg, Dublin, London

Job Description: • This is for individual contributor (IC) role. • Solid background on UVM/SV, • Experience in any of the complex HPC protocols (PCIe/DDR/LPDDR/Ethernet). • Knowledge on the usage of protocol VIPs. • Ability to define and write new test cases from scratch. • Working as part of a team but with autonomous debug capability. • For PCIe Controller verification, DDR / LPDDR Controller verification, UAL Controller verification and AMBA Peripheral Verification • Looking for Solid background on UVM/SV, • Protocols: PCie (gen7 etc), CXL, High Speed Ethernet, DDR / LPDDR • Experience in complex HPC protocols, using protocol VIPs, • Ability to define and write new test cases, working as part of a team but with autonomous debug capability. • Tools: Synopsys simulators / flow

Reasons to use Rodeo

I’m in my final year doing Economics and I don’t know whether to apply for grad schemes now or do a masters first. What do you think?

Honest answer — it depends on where you want to end up. A lot of top grad schemes (Big 4, civil service, banking) don’t need a masters. Let’s look at the ones you’d be competitive for now, and we can decide if a masters actually adds anything.

Also worth knowing: most autumn 2026 applications are open now. Timing matters more than you think.

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Graduate Consultant — 2026 Scheme

PwC·London, UK
£35,000/yr

Why you're a good match

Strong

Your economics background and your summer at a regional bank line up with what PwC looks for on the consulting scheme. Applications close in four weeks.

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Why you're a good match

You’ve got the grades and the economics background, and your bank internship is exactly the experience this scheme looks for. Apply soon — deadlines close within the month.

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Strong

Experience fit

Your summer at the bank plus your econometrics coursework map directly to the day-one responsibilities on this scheme — client modelling, market briefings, and deal support.

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Pls mail CV at payal.c@hcltech.com

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Skills

UVM
SystemVerilog
PCIe
DDR
LPDDR
Ethernet
Protocol VIPs
Test Cases
Debugging
HPC Protocols
Synopsys Simulators
UAL Controller
AMBA Peripheral Verification
High Speed Ethernet
CXL

Location

London, England, United Kingdom

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